Contents | < Browse | Browse >
NAME rev ADDR type chip Description
---------------------------------------------------------------------------
BPLxDAT 110 W A Bit plane x data (parallel to serial convert)
112 These regs recieve the DMA data fetched from RAM by the
114 bit plane address pointers described above.
116 They may also be rewritten by either micro.
118 they act as a 8 word parallel to serial buffer for up
11A to 8 memory 'bit planes'. x=1-8 the parallel to serial
p 11C conversion id triggered whenever bit plane #1 is
p 11E written, indicing the completion of all bit planes for
that word (16/32/64 pixels). The MSB is output first,
and is therefore always on the left.